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- Join Date
- Dec 2007
Memory management in 2.4/2.6 kernel on x86
Let's assume that kernel is executing some process in user mode which has code,data,stack,bss and heap. (First 3GB for user address space and remaining 1GB for kernel address space on x86). I believe CR3 register is unique across processes. A process can have multiple segement and in a flat addressing model code and data segments can share same set of linear address space (i.e.,linear addresses from 0 to 3GB....).If so then how's the paging unit distinguishes the addresses? For example If I am executing an instruction from code segment then all addresses that I get are logical addresses and I will have to go through GDT to get the base virtual address to which I will add an offset to get the linear address. Suppose I want to access some data from the data segment then when I go through GDT, won't I get the same set of linear addresses which I will be feeding to paging unit? (Since both the segements have start and ending addresses as 0x000...to 0xfff...)
Am I getting anything wrong here?