Below are the steps to fetch the cas latency from SPD, can anyone tell me how to access SPD so that I can access the memory bytes and fetch the data using c code.

CAS Latency Calculation and Examples
CAS latency is not a purely analog value as DDR3 SDRAMs use the DLL to synchronize data and strobe outputs with the
clock. All possible frequencies may not be tested, therefore an application should use the next smaller JEDEC standard
tCKmin value (2.5, 1.875, 1.5, or 1.25 ns for DDR3 SDRAMs) when calculating CAS Latency. This section shows how
the BIOS may calculate CAS latency based on Bytes 12 ~ 16.
Step 1: Determine the common set of supported CAS Latency values for all modules on the memory channel using the
CAS Latencies Supported in SPD bytes 14 and 15.
Step 2: Determine tAAmin(all) which is the largest tAAmin value for all modules on the memory channel (SPD byte 16).
Step 3: Determine tCKmin(all) which is the largest tCKmin value for all modules on the memory channel (SPD byte 12).
Step 4: For a proposed tCK value (tCKproposed) between tCKmin(all) and tCKmax, determine the desired CAS Latency.
If tCKproposed is not a standard JEDEC value (2.5, 1.875, 1.5, or 1.25 ns) then tCKproposed must be adjusted to the
next lower standard tCK value for calculating CLdesired.
CLdesired = ceiling ( tAAmin(all) / tCKproposed )
where tAAmin is defined in Byte 16. The ceiling function requires that the quotient be rounded up always.
Step 5: Chose an actual CAS Latency (CLactual) that is greater than or equal to CLdesired and is supported by all mod-
ules on the memory channel as determined in step 1. If no such value exists, choose a higher tCKproposed value and
repeat steps 4 and 5 until a solution is found.