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hi all, I'm having a 2.6.34 tickless kernel on my machine and i disabled the irq balance and isolcpu1-7. So the core1-7 are at idle state. One thing i don't ...
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  1. #1
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    one question about local timer interrupt on tickless system


    hi all,

    I'm having a 2.6.34 tickless kernel on my machine and i disabled the irq balance and isolcpu1-7.
    So the core1-7 are at idle state.

    One thing i don't understand is the LOC interrupt number decreased from core1 to core7.
    I don't know much about how the tickless works but it seems to me core1-7 are totally symmetric and should have similar LOC count.

    Can anyone explain why?

    Thanks
    Kevin



    # cat /proc/interrupts
    Code:
               CPU0       CPU1       CPU2       CPU3       CPU4       CPU5       CPU6       CPU7       
      0:       1975          0          0          0          0          0          0          0   IO-APIC-edge      timer
      1:          8          0          0          0          0          0          0          0   IO-APIC-edge      i8042
      4:          2          0          0          0          0          0          0          0   IO-APIC-edge    
      8:          1          0          0          0          0          0          0          0   IO-APIC-edge      rtc0
      9:          0          0          0          0          0          0          0          0   IO-APIC-fasteoi   acpi
     12:        611          0          0          0          0          0          0          0   IO-APIC-edge      i8042
     18:          0          0          0          0          0          0          0          0   IO-APIC-fasteoi   mgapci:0000:04:00.0
     23:         45          0          0          0          0          0          0          0   IO-APIC-fasteoi   ehci_hcd:usb1
     27:    4380964          0          0          0          0          0          0          0   PCI-MSI-edge      ahci
     28:    7599868          0          0          0          0          0          0          0   PCI-MSI-edge      eth2
    NMI:          0          0          0          0          0          0          0          0   Non-maskable interrupts
    LOC:   43301104   27172170   22968917   20057679   14197661   12650651    8082516    9051005   Local timer interrupts
    SPU:          0          0          0          0          0          0          0          0   Spurious interrupts
    PMI:          0          0          0          0          0          0          0          0   Performance monitoring interrupts
    PND:          0          0          0          0          0          0          0          0   Performance pending work
    RES:     126033       4453         39         38         20         19         17         19   Rescheduling interrupts
    CAL:          0        262        262        262        262        262        262        262   Function call interrupts
    TLB:      88389         33         23          7          5          6          4          2   TLB shootdowns
    TRM:          0          0          0          0          0          0          0          0   Thermal event interrupts
    THR:          0          0          0          0          0          0          0          0   Threshold APIC interrupts
    MCE:          0          0          0          0          0          0          0          0   Machine check exceptions
    MCP:       1951       1951       1951       1951       1951       1951       1951       1951   Machine check polls
    ERR:          7
    MIS:          0
    Last edited by MikeTbob; 11-11-2011 at 03:37 AM. Reason: Added Code Tags

  2. #2
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    CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
    LOC: 43301104 27172170 22968917 20057679 14197661 12650651 8082516 9051005 Local timer interrupts

    make it more clear

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