Find the answer to your Linux question:
Results 1 to 2 of 2
i want to gave much details as possible. working directory (~/a1/shell) in the shell directory i have Makefile that i need help with. also in the shell directory i have ...
Enjoy an ad free experience by logging in. Not a member yet? Register.
  1. #1
    Just Joined!
    Join Date
    Sep 2010
    Posts
    2

    Help with Makefile


    i want to gave much details as possible.

    working directory (~/a1/shell)

    in the shell directory i have Makefile that i need help with.

    also in the shell directory i have subdirectory's (obj, src, include)

    obj subdirectory is empty
    src subdirectory i have these files inside: parser.c, shutil.c, sshell.c
    include subdirectory i have these files inside: parser.h, shell.h

    My current Makefile

    # Beginning of Makefile
    OBJS = shutil.o parser.o sshell.o
    HEADER_FILES = shell.h parser.h
    EXECUTABLE = sshell
    CFLAGS = -Wall
    CC = gcc
    # End of configuration options

    #What needs to be built to make all files and dependencies
    all: $(EXECUTABLE)

    #Create the main executable
    $(EXECUTABLE): $(OBJS)
    $(CC) -o $(EXECUTABLE) $(OBJS)

    #Recursively build object files
    %.o: %.c
    $(CC) $(CFLAGS) -c -o $@ $<

    #Define dependencies for objects based on header files
    #We are overly conservative here, parser.o should depend on parser.h only
    $(OBJS) : $(HEADER_FILES)

    clean:
    -rm -f $(EXECUTABLE) *.o
    run: $(EXECUTABLE)
    ./$(EXECUTABLE)

    tarball:
    -rm -f $(EXECUTABLE) *.o
    (cd .. ; tar czf UltimateDesi_a1.tar.z shell )

    # End of Makefile
    I wanted it so: all .o files are created in the obj subdirectory, and my application, sshell, is created in the shell directory.

    i am getting this error when i run the make run: No rule to make target 'shell.h', needed by 'shutil.o'. stop

    Can somebody please help me, i am new to Makefile and new to unix/linux.

  2. #2
    Just Joined!
    Join Date
    Dec 2008
    Location
    New Hampshire
    Posts
    4

    Help with Makefiles

    For the following directory,

    shell
    |- Makefile
    |-OBJ (folder)
    |-SRC (folder)
    |- .c files
    |-INCLUDE (folder)
    |- .h files


    Add to your makefile

    Code:
    OUTPUT_OPTION = -o OBJ/$@        #This specifies implicit output rule 
    VPATH = INCLUDE                   #Makefile will look for prereq files in current directory then in VPATH.
    if you want the executable in OBJ folder:
    Code:
    $(CC) -o $(OUTPUT_OPTION) $(OBJS)

Posting Permissions

  • You may not post new threads
  • You may not post replies
  • You may not post attachments
  • You may not edit your posts
  •