Find the answer to your Linux question:
Results 1 to 2 of 2
When I do Code: cat /proc/cpuinfo what do all the letter designations stand for? For example: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr, etc. Is ...
Enjoy an ad free experience by logging in. Not a member yet? Register.
  1. #1
    Linux Newbie ThoughtVelocity's Avatar
    Join Date
    May 2005
    Location
    OH
    Posts
    160

    cpuinfo flags


    When I do
    Code:
    cat /proc/cpuinfo
    what do all the letter designations stand for? For example: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr, etc. Is there a list somewhere that has this info?
    "If you are out to describe the truth leave elegance to the tailor."
    -Einstein

  2. #2
    Banned CodeRoot's Avatar
    Join Date
    Sep 2005
    Posts
    567
    From '/usr/include/asm/cpufeature.h':

    Code:
    /* Intel-defined CPU features, CPUID level 0x00000001 (edx), word 0 */
    #define X86_FEATURE_FPU        (0*32+ 0) /* Onboard FPU */
    #define X86_FEATURE_VME        (0*32+ 1) /* Virtual Mode Extensions */
    #define X86_FEATURE_DE         (0*32+ 2) /* Debugging Extensions */
    #define X86_FEATURE_PSE        (0*32+ 3) /* Page Size Extensions */
    #define X86_FEATURE_TSC        (0*32+ 4) /* Time Stamp Counter */
    #define X86_FEATURE_MSR        (0*32+ 5) /* Model-Specific Registers, RDMSR, WRMSR */
    #define X86_FEATURE_PAE        (0*32+ 6) /* Physical Address Extensions */
    #define X86_FEATURE_MCE        (0*32+ 7) /* Machine Check Architecture */
    #define X86_FEATURE_CX8        (0*32+ 8) /* CMPXCHG8 instruction */
    #define X86_FEATURE_APIC       (0*32+ 9) /* Onboard APIC */
    #define X86_FEATURE_SEP        (0*32+11) /* SYSENTER/SYSEXIT */
    #define X86_FEATURE_MTRR       (0*32+12) /* Memory Type Range Registers */
    #define X86_FEATURE_PGE        (0*32+13) /* Page Global Enable */
    #define X86_FEATURE_MCA        (0*32+14) /* Machine Check Architecture */
    #define X86_FEATURE_CMOV       (0*32+15) /* CMOV instruction (FCMOVCC and FCOMI too if FPU present) */
    #define X86_FEATURE_PAT        (0*32+16) /* Page Attribute Table */
    #define X86_FEATURE_PSE36      (0*32+17) /* 36-bit PSEs */
    #define X86_FEATURE_PN         (0*32+18) /* Processor serial number */
    #define X86_FEATURE_CLFLSH     (0*32+19) /* Supports the CLFLUSH instruction */
    #define X86_FEATURE_DTES       (0*32+21) /* Debug Trace Store */
    #define X86_FEATURE_ACPI       (0*32+22) /* ACPI via MSR */
    #define X86_FEATURE_MMX        (0*32+23) /* Multimedia Extensions */
    #define X86_FEATURE_FXSR       (0*32+24) /* FXSAVE and FXRSTOR instructions (fast save and restore */
                                             /* of FPU context), and CR4.OSFXSR available */
    #define X86_FEATURE_XMM        (0*32+25) /* Streaming SIMD Extensions */
    #define X86_FEATURE_XMM2       (0*32+26) /* Streaming SIMD Extensions-2 */
    #define X86_FEATURE_SELFSNOOP  (0*32+27) /* CPU self snoop */
    #define X86_FEATURE_HT         (0*32+28) /* Hyper-Threading */
    #define X86_FEATURE_ACC        (0*32+29) /* Automatic clock control */
    #define X86_FEATURE_IA64       (0*32+30) /* IA-64 processor */

Posting Permissions

  • You may not post new threads
  • You may not post replies
  • You may not post attachments
  • You may not edit your posts
  •