makefile help

[sandeep t]

Following is my Makefile:

----------------------------------------------
all: lib1 lib2

dummy:
        @echo "dummy target"

dummy2:
        @echo "dummy2 target"

lib1: dummy
        @echo "lib1 target"

lib2: dummy dummy2
        @echo "lib2 target"
-----------------------------------------------

The actual output of the above makefile when target 'all' (make all) is built is seen as:

-----------------------
dummy target
lib1 target
dummy2 target
lib2 target
----------------------

I was expecting something like this:

------------------------
dummy target
lib1 target
dummy target
dummy2 target
lib2 target
-----------------------

I'm not able to understand why the commands for target 'dummy' is not executed for target 'lib2' ?

[sandeep t]

I want the dummy target is called everytime. How can I do it?

[thedondj]

Make will only run each dependency once regardless of how many things depend on it. After it's run once make will consider the target up-to-date. I think to force it to run again you would need to run a new make command as one of the commands in each rule.

Something like:

all: lib1 lib2

dummy:
        @echo "dummy target"

dummy2:
        @make -s dummy
        @echo "dummy2 target"

lib1: dummy
        @echo "lib1 target"

lib2: dummy2
        @echo "lib2 target"

Also to ensure that the dummy commands are run you may want to make them depend on a phony target. If you have a target with no dependencies and no commands this will always be considered out of date. Otherwise the dummy commands will not be run if a file called dummy is ever created.

all: lib1 lib2

dummy: .FORCE
        @echo "dummy target"

dummy2: .FORCE
        @make -s dummy
        @echo "dummy2 target"

lib1: dummy
        @echo "lib1 target"

lib2: dummy2
        @echo "lib2 target"

.FORCE:

[sandeep t]

Thanks thedondj... what if I have only target dummy and not dummy2.

Will I call dummy target in rule using make?

lib1: 
        @make dummy
        @echo "lib1 target"

lib2: 
        @make dummy
        @echo "lib2 target"

Is this the right way? Normally should we use the target in the rule?

Make will only run each dependency once regardless of how many things depend on it. After it's run once make will consider the target up-to-date. I think to force it to run again you would need to run a new make command as one of the commands in each rule.

Something like:

all: lib1 lib2

dummy:
        @echo "dummy target"

dummy2:
        @make -s dummy
        @echo "dummy2 target"

lib1: dummy
        @echo "lib1 target"

lib2: dummy2
        @echo "lib2 target"

Also to ensure that the dummy commands are run you may want to make them depend on a phony target. If you have a target with no dependencies and no commands this will always be considered out of date. Otherwise the dummy commands will not be run if a file called dummy is ever created.

all: lib1 lib2

dummy: .FORCE
        @echo "dummy target"

dummy2: .FORCE
        @make -s dummy
        @echo "dummy2 target"

lib1: dummy
        @echo "lib1 target"

lib2: dummy2
        @echo "lib2 target"

.FORCE:

[thedondj]

If you need the default behaviour from make, then you should specify pre-requisites as pre-requisites. The default behaviour from make is to only run commands once for each pre-requisite, regardless of how many targets require it.

If you actually need to run the commands multiple times for a single pre-requisite then you can't use make's built in functionality and have to tell it explicitly to run the commands for that target.

Make's pre-requisites are designed so that it won't run anything that doesn't need to be run.

If, for instance, you were building two executables (progA and progB) from a single object file (lib.o), compiled from a c++ file (lib.cpp). Make would generate the object file only once as there is no need to compile it twice, both compiles would create the same file. Make will compile lib.cpp into lib.o once and use the same lib.o to generate progA and progB.

Also if lib.o already exists (because it has been compiled last time make was run) then make would not generate it at all unless lib.cpp had been changed since it was compiled. If lib.cpp hasn't been changed there's no need for make to recompile it as it will just produce the same result.

[sandeep t]

okay thanks.. I'll explicitly run the commands then as discussed.