Code:
OBJDIR=/dsk1/sthakkar/
EXE=

objs = ex.o

TARGETS= ex$(EXE)

all: $(TARGETS)

ass_tc_begin:
        @echo ass_tc_begin

ass_tc_fail:
        @echo ass_tc_fail

ass_tc_end:
        @echo ass_tc_end


ex$(EXE): $(addprefix $(OBJDIR), $(objs))
        @make ass_tc_begin
        gcc ex.c -o ex || @make ass_tc_fail
        @make ass_tc_end
When I do 'make all', it gives me the following error:
make[1]: *** No rule to make target `ass_tc_begin'. Stop.

When I run 'make ass_tc_begin', it gives me the proper output. I don;t understand where the Makefile is going wrong?