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I want to know the following: Suppose that I have C program doing integer and floating math on 32 and 64 bit ints and floats. Would gcc use 64 bit ...
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  1. #1
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    gcc. Optimization and x86 extentions support.


    I want to know the following:

    Suppose that I have C program doing integer and floating math on 32 and 64 bit ints and floats. Would gcc use 64 bit registers if used on AMD64 and what do I need to compile it in 64 mode. Would there be any performance benefit?

    Would gcc use SSE if not directly ordered?

    I have loop with application of the same math (multiply and substract doubles once) for each element. What is the number of CPU clocks needed to process array of N in optimized gcc?

    Thank you?

  2. #2
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    I can't answer all your questions but here's what I can say:
    Would there be any performance benefit?
    If gcc uses the 64 bit registers probably yes.
    What is the number of CPU clocks needed to process array of N in optimized gcc?
    Unless you look at the assembly code gcc produces , it's impossible to tell.
    And even then I'm not sure.

  3. #3
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    Re: gcc. Optimization and x86 extentions support.

    Quote Originally Posted by muxec
    Suppose that I have C program doing integer and floating math on 32 and 64 bit ints and floats. Would gcc use 64 bit registers if used on AMD64 and what do I need to compile it in 64 mode.
    GCC treats IA32 and AMD64 as two completely different architectures. If you compile a program with an IA32 GCC, it will not use AMD64 extensions by any means. To do that, you need to compile it with an AMD64 GCC (a cross-compiler is fine, of course), but that code won't run on an IA32.

    Quote Originally Posted by muxec
    Would gcc use SSE if not directly ordered?
    I'm not sure if GCC can use SSE at all, actually. Mind you, I'm not sure. I do know that one of the primary advantages of the new abstract syntax tree structure introduced in GCC 4 was to make it easier to get auto-vectorization code into the optimization engine. I don't think that has been done in GCC 4.0, though -- I think it's coming in GCC 4.1. As for the current situation, I have no idea how GCC 3.x does.

    Quote Originally Posted by muxec
    I have loop with application of the same math (multiply and substract doubles once) for each element. What is the number of CPU clocks needed to process array of N in optimized gcc?
    That's completely impossible to tell with today's CPUs. You could calculate a theoretical number, but just that is very hard with a superscalar architecture like IA32 or AMD64 since it's hard to tell which instructions will be able to run in parallel and how the branch-prediction will work and everything. Also, as Santa's little helper says, you'd need to look at the actual assembly output to even have a chance of finding out. Even then, it would be quite different from core to core, since they all do a lot of things differently (including the previously mentioned parallelizing and branch-prediction).

    Even with that theoretical number, however, there's no telling if it will work just like that, since it's hard to predict when you'll get cache or TLB misses. You also have to consider O/S-level chaos, such as the end of your timeslice and paging. Also, an interrupt may arrive and context switch you away, which will cache part of the kernel instead (and may also flush part of the TLB), and make it very hard to tell which parts of your program that will be purged from the cache.

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