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I have a Makefile as below: ----------------------- all: ICU_BUILT ICU_BULIT: mkdir ...... cp ...... . . . ------------------------ I want to add two new targets(which r in other makefile) just ...
  1. #1
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    makefile help

    I have a Makefile as below:
    -----------------------
    all: ICU_BUILT

    ICU_BULIT:
    mkdir ......
    cp ......
    .
    .
    .
    ------------------------

    I want to add two new targets(which r in other makefile) just before the ICU_BUILT target. I wan to call those targets with a variable with the same name as target.

    all: ICU_BUILT drv_end

    ICU_BUILT: MODULE=ICU_BUILT
    ICU_BUILT: drv_begin
    mkdir ....
    cp.....

    The problem is the MODULE name is local to target ICU_BUILT and not not known to drv_end target. How do I export this variable??

  2. #2
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    target specific variable

    Is there any alternative to target-specific variable here?
    I want to know is there ant way that I call a target once the commands get over?

    all: target1
    command..1
    command .. 2

    Where do I call target2 if I want to call it once the above commands are over?

  3. #3
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    Have I asked wrong ques.

    There is no reply to this thread. Have I asked a wrong question?

  4. #4
    drl
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    Hi.
    Quote Originally Posted by sandeep t View Post
    Have I asked a wrong question?
    I think we don't understand what you are looking for.

    I am not sure what you mean when you say "call a target". The problem may be with our differences in language.

    Try to explain it in a different way, and, if possible, show us how you would like it to work, regardless of whether it does work or not.

    If you supply code or a makefile, please make it a code block -- select the text, and click the # symbol above the text entry box to produce:
    Code:
    this is code line one
    a makefile line:
    program: dep1 dep1
      command1
      command2
      ...
    This makes it easier to read ... cheers, drl
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  5. #5
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    Thanks drl.. I'll try to explain here:

    I have a Makefile:

    Code:
    target2:
             @echo target2
    target1:
             @echo target1
    all: target1 target2
             @echo commands

    The output of the above makfile when run will be:

    Code:
    target1
    target2
    commands
    How do I modify the makefile,without using additional targets, if I expect the following output:

    Code:
    target1
    commands
    target2
    thanks !

  6. #6
    drl
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    Hi, sandeep t.

    OK, consider this:
    Code:
    #!/bin/sh
    
    # @(#) s1       Demonstrate make.
    
    set -o nounset
    echo
    echo "GNU bash $BASH_VERSION" >&2
    make --version | head -1 >&2
    echo
    
    echo " Change:"
    cat <<EOF
    target2:
            @echo target2
    target1:
            @echo target1
    all: target1 target2
            @echo commands
    EOF
    
    cat >makefile <<EOF
    all: target1 ghost target2
    
    target1:
            @echo target1
    
    target2:
            @echo target2
    
    ghost:
            @echo commands
    
    EOF
    
    echo
    echo " To:"
    cat makefile
    
    echo
    echo " Producing:"
    echo
    
    make
    
    exit 0
    which results in this output:
    Code:
    % ./s1
    
    GNU bash 2.05b.0(1)-release
    GNU Make 3.80
    
     Change:
    target2:
            @echo target2
    target1:
            @echo target1
    all: target1 target2
            @echo commands
    
     To:
    all: target1 ghost target2
    
    target1:
            @echo target1
    
    target2:
            @echo target2
    
    ghost:
            @echo commands
    
    
     Producing:
    
    target1
    commands
    target2
    cheers, drl
    Welcome - get the most out of the forum by reading forum basics and guidelines: click here.
    90% of questions can be answered by using man pages, Quick Search, Advanced Search, Google search, Wikipedia.
    We look forward to helping you with the challenge of the other 10%.
    ( Mn, 2.6.n, AMD-64 3000+, ASUS A8V Deluxe, 1 GB, SATA + IDE, Matrox G400 AGP )

  7. #7
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    Please help

    Thanks drl.. But as I said.. I don;t want to add any extra targets.
    See, basically we have working Makefiles and our product build also goes fine. Now, we want to report that build to our QAServer where we can see build results. So we have a Makefile(qa.mk) where we have all reporting commands in the form of targets. Its just we have to call the start targets(qa_start) before the actual component targets(icu_all) is called and call the end targets(qa_end) after it.

    Current working Makefile
    Code:
    -------------------------------
    all: ICU_ALL ICU_INSTALL
    
    ICU_ALL:
               make -C .....
    ICU_INSTALL:
               mkdir ......
               cp ......
    -------------------------------
    We want to have something like following on server:
    Code:
    ICU_ALL  PASS
    ICU_INSTALL  FAIL
    This will be our qa.mk where our reporting commands are defined:
    Code:
    ----------------------------------
    qa_start:
              qastart -id=COMPONENT .....
    qa_end:
              qaend -id=COMPONENT ....
    -----------------------------------
    So I plan to modify the Makefile as follows:
    Code:
    -------------------------------------------------
    include qa.mk
    all: ICU_ALL ICU_INSTALL
    
    ICU_ALL: QA_TARGET=ICU_ALL
    ICU_ALL: qa_start
               make -C .....
    ICU_INSTALL: QA_TARGET=ICU_INSTALL
    ICU_INSTALL: qa_start
               mkdir ......
               cp ......
    -------------------------------------------------
    Here I plan to use target-specific variable to define my component name.
    But the problem is where to call target qa_end in the above Makefile?

    Thanks in Advance !!

  8. #8
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    Sorry.. In the above example.. please replace the "COMPONENT" in qa.mk with "QA_TARGET"

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